The Mercurian™ Processor

High performance combined with low power and high functional integration, make the Mercurian processors ideal for a broad variety of networking and communications systems, including high-end routers/switches, access devices, Web switches and network appliances.


The SB-1250 is the first product within the Mercurian line of processors.

SB-1250 Product Summary
Frequency Range 600MHz-1GHz
CPU SB-1; designed and developed by SiByte
Number of CPUs on chip Two MIPS64 processors
L1 Cache 32KB Data cache, 32KB Instruction cache
L2 Cache 512KB; shared between the two CPUs
Memory Controller DDR SDRAM, supports up to 8GB memory
Network I/O Three 10/100/1000 Ethernet MACs, configurable to packet FIFOs
Standard I/O 32-bit PCI, LDT
Generic I/O Flash, PCMCIA support, GPIO, Serial Interfaces
Package 860 BGA
Power Consumption Approximately 10 Watts (at 800MHz)
Sample Availability 1Q 2001

Powerful CPU Engine

The SB-1 is the high-performance engine behind the Mercurian family of processors. The SB-1 is SiByte’s own implementation of the MIPS64 Instruction Set Architecture (ISA). The core is a quad-issue, in order machine with 32KB data and instruction caches, full memory management unit, TLBs, and advanced branch predictors. Enhanced skew-pipelining allows zero load to use penalty. In other words, a load instruction can be issued in the same cycle as the ALU instruction that uses the results of the load, enabling very high integer and floating point computation rates.

Intelligent, Scalable Multi-Processing (MP) Architecture

An intelligent, scalable design is at the heart of the SB-1250 MP system. The SB-1250 includes on a single chip, two SB-1 64-bit CPUs, 512K L2 cache, a high-bandwidth memory controller, and integrated network standard and system I/O, all connected together via a fast, on-chip Multiprocessor system bus called the ZBbus™. The two CPUs are identical and symmetric, enabling high flexibility in how the two processors can share tasks/workload within a networking system. In addition, unlike other embedded MIPS processors, the SB-1250 is completely coherent; meaning that memory and data coherence is automatically and always maintained, resulting in high data integrity and performance.

Low-Power Processor Design

Through the use of extensive clock gating, a predominantly flop-based design, and other design techniques, the SB-1250 achieves an incredibly low power dissipation for its high level of performance. At 1GHz, each SB-1 CPU on the SB-1250, is estimated to achieve up to 880 MIPS/Watt, making it one of the most power-efficient processors for networking and communications applications.

Comprehensive, Easy to Use Development Platform

The SiByte Development Platform includes a comprehensive set of system tools and software targeted at increasing development productivity and helping customers accelerate system time to market. By leveraging standard third party software tools such as compilers, RTOS packages and debuggers, and an easy to use programming model using higher level C/C++ language, Mercurian processors offer developers high programming flexibility with minimal burden.

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